Specifications

SCI Multiprocessor Communication
8-12
To send out a block start signal of exactly one frame time during a sequence
of block transmissions:
1) Write a 1 to the TXWAKE bit.
2) Write a data word (content not important: a
don’t care ) to the SCITXBUF
register (transmit data buffer) to send a block-start signal. (The first data
word written is suppressed while the block-start signal is sent out and ig-
nored after that.) When the TXSHF (transmit shift register) is free again,
SCITXBUF’s contents are shifted to TXSHF, the TXWAKE value is shifted
to WUT, and then TXWAKE is cleared.
Because TXWAKE was set to a 1, the start, data, and parity bits are re-
placed by an idle period of 11 bits transmitted following the last stop bit of
the previous frame.
3) Write a new address value to SCITXBUF.
A
don’t-care data word must first be written to register SCITXBUF so that the
TXWAKE bit value can be shifted to WUT. After the don’t-care data word is
shifted to the TXSHF register, the SCITXBUF (and TXWAKE if necessary) can
be written to again because TXSHF and WUT are both double-buffered.
The receiver operates, regardless of the SLEEP bit. However, the receiver nei-
ther sets RXRDY nor the error status bits, nor does it request a receive inter-
rupt until an address frame is detected .
8.3.2 Address-Bit Multiprocessor Mode
In the address-bit protocol (ADDR/IDLE MODE bit=1), frames have an extra
bit, called an address bit, that immediately follows the last data bit. The ad-
dress bit is set to 1 in the first frame of the block and to 0 in all other frames.
The idle period timing is irrelevant (see Figure 8–5, ADDR/IDLE MODE bit in
SCICCR.3).
The TXWAKE bit value is placed in the address bit. During transmission, when
the SCITXBUF register and TXWAKE are loaded into the TXSHF register and
WUT respectively, TXWAKE is reset to 0 and WUT becomes the value of the
address bit of the current frame. Thus, to send an address:
1) Set the TXWAKE bit to 1 and write the appropriate address value to the
SCITXBUF register.
2) When this address value is transferred to the TXSHF register and shifted
out, its address bit is sent as a 1, which flags the other processors on the
serial link to read the address.