Specifications

SCI Multiprocessor Communication
8-9 Serial Communications Interface (SCI)
8.3 SCI Multiprocessor Communication
The multiprocessor communication format allows one processor to efficiently
send blocks of data to other processors on the same serial link. On one serial
line, there should be only one transfer at a time. In other words, there can be
only one talker on a serial line at a time.
The first byte of a block of information that the talker sends contains an address
byte
that is read by all listeners. Only listeners with the correct address can be
interrupted by the data bytes that follow the address byte. The listeners with
an incorrect address remain uninterrupted until the next address byte.
All processors on the serial link set their SCI’s SLEEP bit (SCICTL1.2) to 1 so
that they are interrupted only when the address byte is detected. When a proc-
essor reads a block address that corresponds to the CPU’s device address as
set by your application software, your program must clear the SLEEP bit to en-
able the SCI to generate an interrupt on receipt of each data byte.
Although the receiver still operates when the SLEEP bit is 1, it does not set
RXRDY, RXINT, or any of the receive error status bits to 1 unless the address
byte is detected and the address bit in the received frame is a 1 (applicable to
addressed-bit mode). The SCI does not alter the SLEEP bit; your software
must alter the SLEEP bit.
A processor recognizes an address byte differently, depending on the multi-
processor mode used. For example:
- The idle-line mode (section 8.3.1 on page 8-10) leaves a quiet space be-
fore the address byte. This mode does not have an extra address/data bit
and is more efficient than the address-bit mode for handling blocks that
contain more than ten bytes of data. The idle-line mode should be used
for typical non-multiprocessor SCI communication.
- The address-bit mode (section 8.3.2 on page 8-12) adds an extra bit (that
is, an address bit) into every byte to distinguish addresses from data. This
mode is more efficient in handling many small blocks of data because, un-
like the idle mode, it does not have to wait between blocks of data. Howev-
er, at high transmit speed, the program is not fast enough to avoid a 10-bit
idle in the transmission stream.
The multiprocessor mode is software selectable via the ADDR/IDLE MODE bit
(SCICCR.3). Both modes use the TXWAKE flag bit (SCICTL1.3), RXWAKE
flag bit (SCIRXST.1), and the SLEEP flag bits (SCICTL1.2) to control the SCI
transmitter and receiver features of these modes.