Specifications

Differences vs. ’C240 SCI
8-6
8.1.3 SCI Module Registers
Table 8–1. Addresses of SCI Registers
Described In
Address Symbol Name Description
Section
Page
7050h SCICCR SCI communication
control register
Defines the character format, pro-
tocol, and communications mode
used by the SCI.
8.6.1 8-20
7051h SCICTL1 SCI control register 1 Controls the RX/TX and receiver
error interrupt enable, TXWAKE
and SLEEP functions, and the SCI
software reset.
8.6.2 8-22
7052h SCIHBAUD SCI baud register,
high bits
Stores the data (MSbyte) required
to generate the bit rate.
8.6.3 8-25
7053h SCILBAUD SCI baud register,
low bits
Stores the data (LSbyte) required
to generate the bit rate.
8.6.3 8-25
7054h SCICTL2 SCI control register 2 Contains the transmitter interrupt
enable, the receiver-buffer/break
interrupt enable, the transmitter
ready flag, and the transmitter
empty flag.
8.6.4 8-26
7055h SCIRXST SCI receiver status
register
Contains seven receiver status
flags.
8.6.5 8-27
7056h SCIRXEMU SCI emulation data
buffer register
Contains data received for screen
updates, principally used by the
emulator. (Not a real register – just
an alternate address for reading
SCIRXEMU without clearing
RXRDY)
8.6.6.1 8-29
7057h SCIRXBUF SCI receiver data
buffer register
Contains the current data from the
receiver shift register.
8.6.6.2 8-30
7058h Reserved Reserved
7059h SCITXBUF SCI transmit data
buffer register
Stores data bits to be transmitted
by the SCITX.
8.6.7 8-30
705Ah Reserved Reserved
705Bh Reserved Reserved
705Ch Reserved Reserved
705Dh Reserved Reserved
705Eh Reserved Reserved
705Fh SCIPRI SCI priority control
register
Contains the receiver and transmit-
ter interrupt priority select bits and
the emulator suspend enable bit.
8.6.8 8-31