Specifications

Differences vs. ’C240 SCI
8-2
8.1 Differences vs. ’C240 SCI
Multiplexing the SCI pins with general-purpose I/O is controlled by bits in the
digital I/O peripheral. As a consequence, the register SCIPC2 (705Eh) has
been removed.
The CLKENA bit in SCICTL1 (7051h) has been removed, since it served no
purpose in 2-pin SCI implementations.
The function of the SCIENA bit in SCICCR (7050h) has changed, and is now
a LOOP BACK ENA test mode bit. The enable function is no longer required
for correct operation of the SCI.
There is no difference with respect to ’241/’242/’243 SCI.
8.1.1 SCI Physical Description
The SCI module, shown in Figure 8–1, has the following key features:
- Two I/O pins
J SCIRXD (SCI receive data input)
J SCITXD (SCI transmit data output)
- Programmable bit rates to over 65,000 different speeds through a 16-bit
baud select register
J Range with 30-MHz CLKOUT: 57.2 bps to 1875 kbps
J Number of bit rates: 64K
- Programmable data word length from one to eight bits
- Programmable stop bits of either one or two bits
- Internally generated serial clock
- Four error detection flags
J Parity error
J Overrun error
J Framing error
J Break detect