Specifications

7-28

This register contains the number of conversions executed during an auto-

conversion session. An autoconversion session always starts with the “initial

state” and continues sequentially until the “end state” if allowed. The result

buffer is filled in a sequential order. Any number of conversions between 1 and

(MAX_CONVn +1) can be programmed for a session,

- For SEQ1 operation, bits MAX_CONV1_2 – 0 are used.

- For SEQ2 operation, bits MAX_CONV2_2 – 0 are used.

- For SEQ operation, bits MAX_CONV1_3 – 0 are used.

Example 7–3. MAX_CONV Register Bits Programming

If only five conversions are required, then MAX_CONVn is set to four.

Case 1: Dual mode SEQ1 and cascaded mode

Sequencer goes from CONV00 to CONV04, and the five conversion results

are stored in the registers Result 00 to Result 04 of the Conversion Result

Buffer.

Case 2: Dual mode SEQ2

Sequencer goes from CONV08 to CONV12, and the five conversion results

are stored in the registers Result 08 to Result 12 of the Conversion Result

Buffer.

MAX_CONV1 Value >7 for Dual-Sequencer Mode

If a value for MAX_CONV1, which is greater than 7, is chosen for the dual-

sequencer mode (i.e., two separate 8-state sequencers), then SEQ_CNTR_n

will continue counting past seven, causing the sequencer to “wrap around” to

CONV00 and continue counting.