Specifications

ADC Overview
7-15 Analog-to-Digital Converter (ADC)
Figure 7–4. Interrupt Operation During Sequenced Conversions
25 µs
50 µs
EV1 Timer 1
Counter
EV1
PWM
“a” “b” “c” “d”
Sampling
Request
SEQ
Interrupt
Case 1
I
1
,I
2
,I
3
“b”
I
1
,I
2
,I
3
V
1
,V
2
,V
3
SEQ
Interrupt
“d”
Sampling
Request
V
1
,V
2
,V
3
Case 2
“b”
Request
Sampling
Interrupt
SEQ
“d”
Case 3
I
1
,I
2
I
1
,I
2
V
1
,V
2
,V
3
V
1
,V
2
,V
3
I
1
,I
2
,xI
1
,I
2
,x V
1
,V
2
,V
3
V
1
,V
2
,V
3