Specifications

ADC Overview
7-14
Case 3: Number of samples in the first and second sequences are equal
(with dummy read)
- Mode 2 Interrupt operation (i.e., Interrupt request occurs at every other
EOS)
1) Sequencer is initialized with MAX_CONVn = 2 for I
1
, I
2
, x sampling
2) At ISR “b” and “d”, the following events take place :
1) Values I
1
, I
2
, x,V
1
, V
2
, and V
3
are read from ADC result registers.
2) The sequencer is reset.
3) Step 2 is repeated. Note that the third I-sample (x) is a dummy sample, and
is not really required. However, to minimize ISR overhead and CPU inter-
vention, advantage is taken of the “every other” Interrupt request feature
of Mode 2.