Specifications

ADC Overview
7-5 Analog-to-Digital Converter (ADC)
Figure 7–1. Block Diagram of Autosequenced ADC in Cascaded Mode
ADCIN0
ADCIN1
ADCIN2
ADCIN15
MAX_CONV1
Ch Sel (state 0)
Ch Sel (state 1)
Ch Sel (state 3)
Ch Sel (state 2)
Ch Sel (state 15)
State
pointer
10-bit, 500-ns
S/H + A/D
converter
4
SOC EOC
4
10
Analog MUX Result MUX
Result
Select
10
RESULT0
RESULT1
RESULT2
RESULT15
Autosequencer
state machine
Start of sequence trigger
Software
EVA
EVB
External pin (ADCSOC)
Select
MUX
Note: Possible values are:
Channel Select = 0 to 15
MAX_CONV = 0 to 15