Specifications

Event Manager (EV) Interrupts
6-91 Event Manager (EV)
Bits 15–3 Reserved. Reads return zero; writes have no effect.
Bit 2 CAP3INT ENABLE
0 Disable
1 Enable
Bit 1 CAP2INT ENABLE
0 Disable
1 Enable
Bit 0 CAP1INT ENABLE
0 Disable
1 Enable
EVB Interrupt Flag Register A (EVBIFRA)
Figure 6–42. EVB Interrupt Flag Register A (EVBIFRA) — Address 752Fh
15–11 10 9 8
Reserved
T3OFINT
FLAG
T3UFINT
FLAG
T3CINT
FLAG
R-0 RW-0 RW-0 RW-0
7 6–4 3210
T3PINT
FLAG
Reserved
CMP6INT
FLAG
CMP5INT
FLAG
CMP4INT
FLAG
PDPINTB
FLAG
RW-0 R-0 RW-0 RW-0 RW-0 RW-0
Note: R = Read access, W = Write access, -0 = value after reset
Bits 15–11 Reserved. Reads return zero; writes have no effect.
Bit 10 T3OFINT FLAG. GP timer 3 overflow interrupt.
Read: 0 Flag is reset
1 Flag is set
Write: 0 No effect
1 Reset flag
Bit 9 T3UFINT FLAG. GP timer 3 underflow interrupt.
Read: 0 Flag is reset
1 Flag is set
Write: 0 No effect
1 Reset flag