Specifications
PWM Circuits Associated With Compare Units
6-50
Bit 5 EDBT1. Dead-band timer 1 enable (for pins PWM7 and PWM8 of Compare
Unit 4).
0 Disable
1 Enable
Bits 4–2 DBTPS2 to DBTPS0. Dead-band timer prescaler.
000 x/1
001 x/2
010 x/4
011 x/8
100 x/16
101 x/32
110 x/32
111 x/32
x = Device (CPU) clock frequency
Bits 1–0 Reserved. Reads return zero; writes have no effect.
Inputs and Outputs of Dead-Band Unit
The inputs to the dead-band unit are PH1, PH2, and PH3 from the asymmetric/
symmetric waveform generators of compare units 1, 2, and 3, respectively.
The outputs of the dead-band unit are DTPH1, DTPH1_, DTPH2, DTPH2_,
DTPH3, and DTPH3_, corresponding to PH1, PH2, and PH3, respectively.
Dead Band Generation
For each input signal PHx, two output signals, DTPHx and DTPHx_, are gener-
ated. When dead-band is not enabled for the compare unit and its associated
outputs, the two signals are exactly the same. When the dead-band unit is en-
abled for the compare unit, the transition edges of the two signals are sepa-
rated by a time interval called dead-band. This time interval is determined by
the DBTCONx bits. If you assume the value in DBTCONx[11–8] is
m,
and the
value in DBTCONx[4–2] corresponds to prescaler
x/p,
then the dead-band val-
ue is (
p
*
m
) device clock cycles.
Table 6–13, on page 6-51, shows the dead-band generated by typical bit com-
binations in DBTCONx. The values are based on a 50 ns device clock.
Figure 6–20, on page 6-52, shows the block diagram of the dead-band logic
for one compare unit.










