Specifications

Compare Units
6-41 Event Manager (EV)
Figure 6–14. Compare Control Register B (COMCONB) — Address 7511h
15 14 13 12 11 10 9 8
CENABLE
CLD1 CLD0 SVENABLE ACTRLD1 ACTRLD0 FCOMPOE Reserved
RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0
7–0
Reserved
R-0
Note: R = Read access, W = Write access, -0 = value after reset
Bit 15 CENABLE. Compare enable.
0 Disable compare operation. All shadowed registers (CMPRx,
ACTRB) become transparent.
1 Enable compare operation.
Bits14–13 CLD1, CLD0. Compare register CMPRx reload condition.
00 When T3CNT = 0 (that is, on underflow)
01 When T3CNT = 0 or T3CNT = T3PR (that is, on underflow or
period match)
10 Immediately
11 Reserved; result is unpredictable.
Bit 12 SVENABLE. Space vector PWM mode enable.
0 Disable space vector PWM mode.
1 Enable space vector PWM mode.