Specifications

General-Purpose (GP) Timers
6-14
6.3 General-Purpose (GP) Timers
There are two general-purpose (GP) timers in each module. These timers can
be used as independent time bases in applications such as:
- The generation of a sampling period in a control system
- Providing a time base for the operation of the quadrature encoder pulse
(QEP) circuit (GP timer 2/4 only) and the capture units
- Providing a time base for the operation of the compare units and
associated PWM circuits to generate PWM outputs
Timer Functional Blocks
Figure 6–3 shows a block diagram of a GP timer. Each GP timer includes:
- One readable and writeable (RW) 16-bit up and up/down counter register
TxCNT (x = 1, 2, 3, 4). This register stores the current value of the counter
and keeps incrementing or decrementing depending on the direction of
counting.
- One RW 16-bit timer compare register (shadowed), TxCMPR (x = 1, 2,
3, 4)
- One RW 16-bit timer period register (shadowed), TxPR (x = 1, 2, 3, 4)
- RW 16-bit individual timer control register, TxCON (x = 1, 2, 3, 4)
- Programmable prescaler applicable to both internal and external clock
inputs
- Control and interrupt logic
- One GP timer compare output pin, TxCMP (x = 1, 2, 3, 4)
- Output conditioning logic
Another overall control register, GPTCONA/B, specifies the action to be taken
by the timers on different timer events, and indicates the counting directions
of the GP timers. GPTCONA/B is readable and writeable, although writing to
the status bits has no effect.
Note:
Timer 2 can select the period register of timer 1 as its period register. In
Figure 6–3, the mux is applicable only when the figure represents timer 2.
Timer 4 can select the period register of timer 3 as its period register. In
Figure 6–3, the mux is applicable only when the figure represents timer 4.