Specifications

Event Manager (EV) Functional Blocks

6-8

Table 6–2. Event Manager B Pins

Pin Name Description

CAP4/QEP3 Capture Unit 4 input, QEP circuit input 3

CAP5/QEP4 Capture Unit 5 input, QEP circuit input 4

CAP6 Capture Unit 6 input

PWM7 Compare Unit 4 output 1

PWM8 Compare Unit 4 output 2

PWM9 Compare Unit 5 output 1

PWM10 Compare Unit 5 output 2

PWM11 Compare Unit 6 output 1

PWM12 Compare Unit 6 output 2

T3CMP Timer 3 compare/PWM output

T4CMP Timer 4 compare/PWM output

TCLKINB External clock input for Timers in EVB

TDIRB

External timer direction input in EVB

6.1.3 Power Drive Protection Interrupt (PDPINTx, x = A or B)

An interrupt is generated when the device pin power drive protection interrupt

(PDPINTx) is pulled low. This interrupt is provided for the safe operation of sys-

tems such as power converters and motor drives. If PDPINTx is unmasked,

all EV output pins will be put in the high-impedance state by hardware immedi-

ately after the PDPINTx

pin is pulled low. The interrupt flag associated with

PDPINTx is also set when such an event occurs; however, it must wait until the

transition on PDPINTx has been qualified and synchronized with the internal

clock. The qualification and synchronization causes a delay of

clock cycles.

If PDPINTx is unmasked, the flag keeps the EV outputs in the high-impedance

state and generates a peripheral interrupt request. The setting of the flag does

not depend on whether PDPINTx

is masked: it happens when a qualified tran-

sition occurs on the PDPINTx pin. PDPINTx can be used to inform the monitor-

ing program of motor drive abnormalities such as over-voltage, over-current,

and excessive temperature rise.

This interrupt is enabled following reset.