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48 MHz

PLL

XT2

XT1

VLO

REFO

MCLK

SMCLK

ACLK

USB Module

Apply a crystal, or source a

clock signal into XIN

XIN

XOUT

F5xx UCS Module

USB

General

MSP430

MSP430 USB Hardware Design

www.ti.com

For developers who want to source into VUSB from an external source, the Descriptor Tool includes a

checkbox for this. If checked, it causes the USB API to keep the internal 3.3-V LDO disabled. However,

you must still attach the VBUS signal from the USB cable to the VBUS pin, in the manner shown. The

presence of 5 V on VBUS is the way in which USB devices determine whether a host is available;

therefore, software needs this signal.

4.3 Selecting a Clock Configuration

The MSP430 USB module internally uses a 48-MHz clock, which is generated from an integrated PLL.

The PLL needs a precise reference clock, which comes from the XT2 oscillator.

Figure 10. MSP430 USB Clock Connections

4.3.1 Choosing a Source

The biggest consideration is precision. The USB specification requires the clock have a tolerance of

±2500 ppm. Sources that do not meet this may actually work under some conditions, perhaps with

compromised performance. But choosing a source that meets the requirement will provide consistent best

performance and ensure USB compliance.

With this in mind, the engineer has three basic choices to source the PLL reference, shown in Table 4.

Table 4. Possible XT2 Clock Sources

Frequency

Source When to Use?

Range

External clock source 1.5-32 MHz If a clock that is always available during USB communication is present on the board, this

(put XT2 in "bypass" is often the best choice, because it saves the cost of a crystal. However, if the USB BSL

mode) will be used, it must be modified for bypass mode, and this might affect its use for

programming at production – see Section 3.6.

Crystal 4-32 MHz Crystals provide great flexibility and excellent precision.

Ceramic resonator 4-32 MHz Many resonators do not achieve the required tolerance. However, a few (for example,

some parts within the Murata CERALOCK

family) do. These might be less expensive

than crystals.

NOTE: Always verify parameters against the most recent device data sheet.

See the Unified Clock System (UCS) chapter of the MSP430x5xx and MSP430x6xx Family User's Guide

(SLAU208) for information on sourcing a clock into XT2's XIN pin in bypass mode.

The source must also not contain excessive jitter that would interfere with the PLL's ability to lock to it.

(For this reason, the MSP430 FLL output cannot be used as a reference for the PLL.) Whether using a

crystal or bypass mode, be sure the frequency is compatible with the options available for the

programmable PLL (see the MSP430x5xx and MSP430x6xx Family User's Guide).

Starting a USB Design Using MSP430™ MCUs SLAA457A–September 2013–Revised May 2014

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