User`s guide
PUR
1.4k, ±1%
D+
D-
10pF
>6V, ±10%
GND
D-
D+
VBUS
SHIELD
IO1 IO2
GND VCC
VBUS
MSP430
VBUS
TPD2E001
ESD Suppressor
27, ±5%
27, ±5%
10pF
>6V, ±10%
Supports hardware-
invoked bootstrap loader
100, ±5%
VUSB
0.1uF
1M, ±5%
4.7uF
>10V
VUSB
V18
220nF
>6V
220nF
>6V
XT2IN
XT2OUT
External clock
source >1.5MHz
>4MHz
Choose crystal, resonator,
or an external clock
source
VSSU
Position
caps close to
VUSB/V18/VSSU
System
5V
3.3V +/-9%If internal LDO is
enabled (default),
VUSB sources out.
Can also be sourced in.
MSP430 USB Hardware Design
www.ti.com
Figure 8. MSP430 Reference Design for USB-Related Pins
14
Starting a USB Design Using MSP430™ MCUs SLAA457A–September 2013–Revised May 2014
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