Specifications

Reference Design

XAPP938 (v1.0) March 28, 2007 www.xilinx.com 12

M66EN and PCIXCAP

Users must know how to set the ML455 board to indicate to the system if it is a PCI-X or PCI

card. As described in Chapter 6 of the PCI-X Protocol Addendum to the PCI Local Bus

Specification, Rev 2.0, the combination of M66EN and PCIXCAP advertise the ability of the

card to the system controller. The ML455 board allows users to customize the board through

the following settings:

M66EN – 66 MHz Enable

P1.B49 is wired to two-pin header pin P9.1. With the P9 jumper shunt removed, M66EN has a

0.01 µF capacitor to GND. Placing the jumper shunt across pins 1 and 2 of P9 shorts M66EN

to GND.

• M66EN = GND indicates 0 to 33 MHz operation.

• M66EN = Open indicates 33 MHz to 66 MHz operation. M66EN is pulled up on the system

board.

PCIXCAP – PCI-X Capability

P1.B38 is wired to 3-pin header P8 (center pin).

• P8.1 is wired to GND through a 10 KΩ pulldown resistor.

• P8.2 is wired to P1.B38 and a 0.01 µF capacitor to GND.

• P8.3 is wired to GND.

• A jumper shunt across P8 pins 1 and 2 indicates that the card is PCI-X 66 capable.

• No jumper shunt across P8 indicates that the card is PCI-X 133 capable.

• A jumper shunt across P8 pins 2 and 3 indicates that the card is not PCI-X capable (i.e., is

PCI, not PCI-X).

The terms "P1.B49" and "P1.B38" refer to pins defined on the PCI edge connector. For more

information on the pin designations and the jumper settings, please refer to the ML455 User

Guide (UG084).

LEDs

This reference design uses the ML455 onboard LEDs to indicate the mode, reconfiguration,

and clock pulse status (Tabl e 7).

Design Files

The reference design is available in both VHDL and Verilog. The directory structure of the

design files is shown in Figure 5. Already implemented bit files are also provided to allow for

quick download and use on the ML455 board. However, all necessary files including the PCI-X

wrapper and UCF files are provided to re-create the bit files. The actual LogiCORE for PCI-X is

not included in the application note ZIP file because users must obtain a license to access this

core. This can be done by visiting the PCI-X Lounge.

Table 7: LED Definitions

LED Signal Board Designation Description

LED0 USER1 D1 PCI-X Enable: LED is on when core is in PCI-X mode.

LED1 USER2 D2 Bus Width: LED is on when core is in 64-bit mode.

LED2 USER3 D3 RTR: LED is on when the core needs to be reconfigured.

LED3 USER4 D4 Clock Pulse: LED blinks noticeably when clock is live.