Specifications

When the Bit output of the PAL is logic high, the corresponding
MOSFET switch is turned on and the relay will be energized.
NOTE
The Truth Table on the schematic lists the Turns In Use per each
Band.
R.5.8.3
1C1 Band Switching
The series capacitance at the ground end of the combiner is used
to resonate with the combiner inductance to reduce the peak
voltage on the combiner pipe. Capacitors C2, C3, C49 and C50
are in parallel with a group of 5 fixed capacitors. The total
capacitance value is changed in 3 bands by three relays K2 (Bit
1), K3 (Bit 1) and K4(Bit 0).
The relay driver outputs are at J21.
R.5.8.4 2L1 Band Switching
The large series tuned inductor in the output network is band-
switched to allow the series variable capacitor 2C1 to be in range
for the entire frequency range. Motor Drive Assemblies 2A8 (Bit
1) and 2A9 (Bit 0) are used to short out unused turns of the coil
depending on the 3 bands.
R.5.8.4.1 Inductor Switch Assemblies
When the outputs of the PAL are both logic low, both shorting
contacts of S5 and S6 will be away from the coil, using the full
inductance. When S5 is closed, 5 turns of the coil are shorted out.
When S6 is closed, 3 turns of the coil are shorted out.
The Inductor Switch outputs are at J7.
R.5.8.5 2C5 Band Switching
A small value of capacitance 2C5 is switched in by a vacuum
relay K5 at the output of the combiner. This shifts the resonance
of the combiner at a few frequencies where the combiner may go
resonant at a harmonic of the carrier frequency. Only B0 is used
to control this 2 band circuit. The relay driver output is at J7.
R.5.9
2C3/2C4 PAL
The 2C3/2C4 PAL receives the Band Data and encodes the
outputs for the 2C3 and 2C4.
NOTE
The External Phase Adjustment B0 through B5 are not being
used by the PAL in this application.
R.5.9.1 2C4 Band Switching
2C4 is the output Pi matching shunt capacitance. It is used in
conjunction with the transmitter loading to match antenna im-
pedances. This 4 Bit system basically switches four vacuum
relays K4C through K4F in binary fashion to achieve the desired
value in 15 bands. The relay driver outputs are at J10.
R.5.9.2 2C3 Band Switching
A small value of capacitance C3B is switched in a single band
by vacuum relay K3B, to allow the variable capacitor 2C3 to trap
out the third harmonic for the entire frequency range. Only B0
is used to control this 2 band circuit. The relay driver output is at
J10.
R.5.10
2C2 PAL
2C2 is the shunt capacitance in the input of the Pi matching
network. This 5 bit system basically switches six vacuum relays
K2E through K2N in binary fashion to achieve the desired value
in 26 bands. The relay driver outputs are at J8.
NOTE
There are two relays connected to the bit 4 output.
R.5.11 SYNTH PAL
For optimum VSWR protection the Synthesizer Interface output
must be synced to the combiner current during a VSWR fault
condition. This sync signal must be optimized for each fre-
quency. This circuit basically involves changing the delay of the
combiner sample such that the oscillator and combiner sample
are in phase. This output is a TTL active high logic 6 bit signal
that divides the range into 58 bands. The output to the Frequency
control Interface board at J17.
R.5.12
PREDRIVER PAL
The PREDRIVER PAL receives the Band Data and encodes the
outputs for the Predriver tuning components and the Predriver
level.
R.5.12.1 Predriver Tuning
The Predriver is tuned by a binary combination of inductance and
Capacitance that is switched by relays on the Predriver Tuning
board. The Predriver tuning is a 5 bit signal for frequency tuning
in 31 bands. The relay outputs are at J1.
R.5.12.2 Predriver Level
The Bit 0 output is a 2 band output for switching the series
resistance in the power supply line for optimum Predriver output
level.
R.5.13
A/D PAL
The A/D PAL receives the Band Data and encodes the outputs
for the A/D Phase, A/D Frequency, and Driver Level on the
Driver Encoder at J16.
R.5.13.1 A/D Phase
The transmitter A/D phasing is also frequency dependant and
must be optimized for each frequency. This circuit basically
involves changing the delay of the A/D sample frequency such
that the RF Amplifier switches at the optimum time. This output
is a TTL logic 6 bit signal to drive a programmable delay device
in 63 bands.
R.5.13.2 A/D Frequency
Also required is the ability to switch the A/D sample frequency
from the same as the carrier frequency (below Fc of 1 MHz) to
1/2 of the carrier frequency when the transmitter carrier is over
1 MHz. When the output is logic low, the sample frequency will
equal the transmitter frequency.
R.5.13.3 Driver Level
The Driver Level output is used to control the frequency deter-
mined Drivers on the Driver Combiner Motherboard. This is a 2
bit active high output that breaks the frequency range into 4
bands.
R.5.14
DRIVER PAL
The DRIVER PAL receives the Band Data and encodes the
outputs for the Driver Tuning Assembly and the Driver Level
toroid, at J2.
888-2339-002 R-5
WARNING: Disconnect primary power prior to servicing.