Specifications
adjustable gain control R143 Low Frequency THD Null, this
control is adjusted to improve low frequency distortion.
The outputs of the DC amplifier and the AC amplifier are
combined and applied to U27-13. A current limit voltage is also
added to U27-13 and will be discussed later. U27-14 is a buffer
amplifier, its output is the correction voltage and goes to input
X1 of multiplexer U16.
This circuit induces a Pre-Distortion component to cancel any
power supply ripple or hum and power supply variations caused
by the lower frequency modulation signals. The 100K variable
resistor R29 (THD Null) may be adjusted for minimum output
distortion.
J.6.3.1.1 Power Up Circuit
Diodes CR12 and CR13, capacitor C39, and the resistive voltage
divider comprised of R61 and R62 form a power up circuit such
that when supply voltage is applied U16 will properly respond
to the Correction signal.
J.6.4
Differential Amplifier
The output of the power supply correction divider U16-4 is
buffered by a section of U4. R64 connects this signal to Foldback
through R10-6 and sends the signal to the (+) input of differential
amplifier U4-5. The (-) input of the differential amplifier U4-6
is connected to P6-2.
The Power Step Up and Foldback circuits are connected to the
(+) input at U4-5. The Fine Power Control circuit is normally
connected to the (-) input at P6-3.
The purpose of the differential amplifier U4-7 is to amplify the
difference between the (+) input and the (-) input to allow the
three functions described above.
J.6.5
Foldback
Power levels upon startup and during any foldback series of
commands are controlled using resistiveattenuation of the Audio
+ DC. This is accomplished using U12 and resistors R69 through
R75. Switch U12 is given binary instructions (FBOUT1, 2 & 3)
and it in turn connects one of the above resistors to R64. This
gives another path for the (Audio + DC) to ground and controls
the level of (Audio + DC) that reaches the input of U4-5 (Power
Control).
U5 (Foldback Comparator) receives 3 sets of inputs; Master
Foldback, Internal Foldback and Ramp.
NOTE: Master Foldback inputs Bits 1, 2 & 3 are not used in this
configuration so they are always low.
This Comparator determines which request is greater and feeds
that to FBOUT1, 2 & 3 which is in turn fed to U12, discussed in
previous paragraph.
In the normal on-air non-foldback condition, DB1, DB2 and
DB3 are all low, as are RAMP1, RAMP2 and RAMP3 and the
switch is not connected, effectively an open circuit. If the Con-
troller has determined that the transmitter should be in foldback
-.5 dB, DB1 (J2-17) will go high (+5VDC). Level Shifters U25-2
and U14-2 will convert the +5vDC to a high (+15VDC) and the
switch will be connected from U12-3 to U12-14. This connects
R69 and the voltage divider action reduces the power to 89 kW.
The following chart lists the Foldback steps and power levels.
Foldback
Level
DB1 DB2 DB3 U12-3
connected
to
Power
0 dB L L L U12-13 100 kW
-0.5 dB H L L U12-14 89 kW
-1.0 dB H H L U12-12 79 kW
-2.0 dB L H L U12-15 63 kW
-3.0 dB L H H U12-2 50 kW
-6.0 dB H H H U12-4 25 kW
-10.0 dB H L H U12-5 10 kW
-12.0 dB L L H U12-1 6 kW
J.6.6
Power Ramp Up
Ramp up is the process of starting the transmitter at a relatively
low power level and then advancing the power level (in steps) to
full power. The rate of the steps (and therefore the time required
to come to full power) is adjustable by using Jumper JP9.
The 16 Hz clock comes into U5 at Pin 1. JP9 is a three position
jumper set. The three positions are Fast, Normal and Slow. The
table below shows the approximate times for each setting of JP9:
Speed JP9 Approx.
Time
Fast 2-4 0.5 Seconds
Normal 3-4 2 Seconds
Slow 1-2 3 Seconds
This is fed to the clock input (pin 1) of U6, the Ramp PAL.
J.6.7
Fine Power Control
Fine Power Control allows the power output to be varied plus or
minus 10 percent by using the Raise and Lower front panel
controls which activate PAL U21, U20 or U19 depending upon
the power level selected. The PAL’s are programmed to act as up
/ down counters which send a digital word to the digital potenti-
ometer. The Fine Power Controls are centered in its 3 ranges by
placing S1 in the Calibrate position, and adjusting the three
power levels for the desired output. R65 sets the HIGH power
level, R67 sets MED, and R66 for LOW.
J.6.7.1 Digital Potentiometer
A signal from U4-1 is applied to buffer input U7-3 and is then
fed to the input of a digital potentiometer U18-15. U18 is a
digitally Controlled potentiometer. That is the value of the digital
word on the input pins results in an attenuation of the signal on
the output. The output of the digital potentiometer U18-1 is
bufferedbyU7-7andconnectedtoP6-3.WhenP6isinthe
NORMAL position, this signal is connected to the (-) input of
differential amplifier U4-6.
When the resistance of the digital pot changes, the voltage at the
(-) input of the differential amplifier varies and so does the
output. U18 is controlled by the eight bit digital word DB0 (LSB)
888-2339-002 J-3
WARNING: Disconnect primary power prior to servicing.