Specifications

the capacitor is charged, the PD_ON input will go back to a logic
high and turn on the Predriver again.
E.6.5.3 Remote Predriver Select Transistor
Transistor Q3 is used as a switch that is in parallel with S5. When
the Predriver Select - H input at J3 is logic high, Q3 will be turned
on and Predriver B will be selected.
E.6.6
Drive Level Detector
An RF Sample from the RF Splitter board is applied to the Drive
Level Detector input at J7. The transformer and components on
its primary, simulate the input of an RF Amplifier. One of the
transformer secondaries is connected to a rectifier and filter
capacitor. This rectifier converts the RF signal to a dc voltage
proportional to the RF drive level applied to all Big Step and
Binary RF Amplifiers and can be measured at TP7 Drive.
E.6.7
Driver AGC
The RF drive level dc voltage from TP7 is connected to a buffer
amplifier and to one input of a differential amplifier formed by
U20. The other input of the differential amplifier is an adjustable
Automatic Gain Control dc voltage set by R100. It is adjusted
such that approximately 21Vp-p of RF drive is applied to all 160
RF Amplifiers over the entire frequency band. The output of the
differential amplifier is connected to 4 comparators.
E.6.8
AGC Comparators
The RF drive level dc voltage from TP7 is connected to the (+)
inputs of 4 comparators labeled AGC0 through AGC3. The (-)
inputs of the comparators are connected to resistive voltage
divider that supplies +2VDC, +3VDC, +4VDC, and +5VDC as
the threshold inputs.
When the output of the differential amplifier goes more positive
than the threshold of each comparator, the output of the compa-
rator will go logic high.
When the output of the differential amplifier goes less positive
than the threshold of each comparator, the output of the compa-
rator will go logic low.
These 4 outputs are used by the R DRIVERS PAL to control the
D11 through D14 Driver Amplifiers.
E.6.9
Drive Level Fault Sensing
Drive Level Fault Sensing is used to protect the transmitter under
two fault conditions.
E.6.9.1 High Drive Comparator
The RF drive level dc voltage from TP7 is also connected to the
to the negative (-) input of the High Drive Fault comparator. A
reference voltage is set, on the positive (+) input of the compa-
rator at TP5 High Drive, with the High Drive Adjust control R84.
Normally the voltage at the positive (+) input will be higher than
the voltage at the negative (-) terminal, and the output of the
comparator will be logic high.
If the RF drive level dc voltage increases above the reference
voltage, the comparator output will go logic low. This sends a
High Drive Fault - Low to the Controller at J3, which is an
Overload fault.
The High_D output of the other comparator is not being used in
this configuration.
E.6.9.2 Low Drive Comparator
This RF drive level dc voltage from TP7 is sent to the positive
(+) input of the Low Drive Fault comparator. A reference voltage
is set, on the negative (-) input of the comparator at TP6 Low
Drive, by the Low Drive Adjust R86. Normally the voltage at the
positive (+) input will be higher than the voltage at the negative
(-) terminal, and the output of the comparator will be logic high.
If the RF drive leveldc voltagedrops below the referencevoltage,
the comparator output will go logic low. A Low Drive Fault -
Low will be sent to the Controller at J3, which is an Overload
fault.
The Low_D output of the other comparator is not being used in
this configuration.
E.6.9.3 Low Drive Comparator Threshold
Transistor Q6 is used to disable the Low Drive Fault comparator
while the transmitter is OFF.
When the transmitter is OFF, the TX_ON_EN input is logic low
and anode of CR3 is pulled logic high by the inverter. Capacitor
C36 charges from ground through resistors and the transistor is
turned on. The collector of the transistor and the (-) input of the
comparator is pulled logic low. This disables the Low Drive Fault
sensing.
When the transmitter is turned on, the TX_ON_EN line will be
logic low. This will reverse bias the diode and allow the capacitor
to discharge through the base of the transistor. The transistor
slowlyturns off,allowing the reference voltage to rise on (-) input
of the comparator and enables the Low Drive fault comparator.
This delay allows time for the RF drive system to reach normal
operating parameters during the step-start sequence.
E.6.10
Driver Level Output
The RF drive level dc voltage from TP7 is also connected to a
Drive Sample Buffer and eventually becomes the Relative Drive
Level reading on the front panel multimeter and the Driver
Sample on the Frequency Control board Multimeter.
E.6.11
Buffer Level Sensing
Separate rectified RF output samples from Buffer Amplifier A
and B from the Driver Combiner Motherboard are applied to the
fault sensing circuit inputs at J8.
Both Buffer Amplifiers are normally in operation. The Buffer
Fault Sensing circuit however, will monitor only the Buffer
Amplifier being used. This is determined by the Predriver Relay
Drive signal.
E.6.11.1 Buffer A
Normally Predriver A is selected for operation and +15VDC is
present on the Predriver Relay Drive (PD_Relay_On) output at
J8. This +15VDC provides a reference voltage at the (-) input of
Buffer A fault comparator U15 through a resistive voltage di-
vider.
The RF level dc voltage sample from Buffer A output supplies a
positive voltage at the (+) input of the comparator at TP2 Buffer
E-4 888-2339-002
WARNING: Disconnect primary power prior to servicing.