Specifications

b. The logic level of the Binary inputs to the Synthesizer is
listed on the right side of the chart.
NOTE - In Low Band operation, the Decimal Point follows the
3MSB so the Binary input is 1599.0 (100Hz Step Adjustment = 0)
A.6.4.2 High Band Digit Shifting
When a High Band frequency has been selected, the Band High
output of the SYNTH PAL U11-21 will be a logic low:
NOTE - All of the High Band Buffers are active and all of the
Low Band Buffers are disconnected.
a. The MSD 4 Bit and 2MSD 4 Bit input is connected to the
SYNTH PAL. The output of the Digit Shift inside the
SYNTH PAL is directly connected to the MSB 4 Bit
Synthesizer input.
b. The 2MSD 4 Bit input is connected to the 2MSB 4 Bit
Synthesizer input via the Data Latch U9.
c. The 3MSD 4 Bit input is connected to the 3MSB 4 Bit
Synthesizer input via the Data Latch U10.
d. The LSD 4 Bit input is connected to the LSB 4 Bit
Synthesizer input via the Data Latch U10.
If a frequency of 1600 kHz (lower left corner) was entered on
the Frequency Control Panel Frequency Select switches:
a. The logic level of the BCD inputs is listed on the left side
of chart.
b. The logic level of the Binary inputs to the Synthesizer is
listed on the right side of the chart.
NOTE-InHighBandoperation,theDecimalPointfollowsthe
MSB so the Binary input is 1.600 (100Hz Step Adjustment not
active)
If a frequency of 1605 kHz (lower right corner) was entered on
the Frequency Control Panel Frequency Select switches:
a. The logic level of the BCD inputs is listed on the left side
of chart.
b. The logic level of the Binary inputs to the Synthesizer is
listed on the right side of the chart.
NOTE-InHighBandoperation,theDecimalPointfollowsthe
3MSB so the Binary input is 1.605 (100Hz Step Adjustment not
active)
A.6.5
Data Latches
The frequency program data is latched by the Frequency Data
Latches U9 and U10, before going into the Synthesizer to
prevent inadvertent changing of frequency. No change in fre-
quency can occur unless the Band Latch Input is clocked high.
This clock input at J6-17, is a 4 kHz clock from the Frequency
Control Interface board when the transmitter is in the FRE-
QUENCY CHANGE MODE ONLY.
A.6.6
Synthesizer RF Output Buffer/Driver
The output of the Synthesizer, a squarewave at J8-42, is inverted
by buffer U5-7. This signal will normally pass through JP2 1-2,
JP1 2-1, and the normally closed contacts of U4 4-2 and is
applied to U3-2. The output impedance of inverter U3-7 is very
low, and resistor R31 sets the 50-Ohm output impedance of the
Synthesizer Interface board. The output signal at J4-8 is a 4-4.5
Vp-p square wave and connects to the RF Interface.
A.6.7
Synthesizer Detector Output
The RF output from U3-7 is converted to positive and negative
dc voltages by peak detectors CR7-C18 and CR6-C17. These
dc voltages go to a fault circuits on RF Interface, through
resistors R19 and R21. With a normal squarewave output, the
(+) voltage is greater that the (-) voltage output. If the RF output
from the Synthesizer Interface board is a continuous logic high
or logic low, the (-) will become greater that the (+) and a
Synthesizer Fault will be generated on the RF Interface.
A.6.8
External Input
An AM stereo generator or high-stability external oscillator can
be connected to BNC jack J2, which is located on the Synthe-
sizer Interface board. The external input impedance is either 50
Ohms or approximately 20k Ohms, depending on the position
of jumper plug P3. The high impedance input is for use with
TTL level (4 to 4.5 Volt peak-to-peak square wave). With a 50
Ohm input impedance, RF input levels from 0 to +25 dBm can
be accommodated. (At 50 Ohms, 0 to +25 dBm is 1 mW to 316
mW, or 0.22 V rms to 4 V rms).
AmplifierQ3 and buffer/driver U5-5 provide a logic-level signal
to JP2 3. Diodes CR8 and CR9 at Q3 input provide protection
against excessive input voltages.
A.6.9
Internal/External Synthesizer and Combined
Transmitter Operation
Jumper plug JP1 is used to select either the internal Synthesizer
or an external combiner RF Input. JP1 2-1 selects the internal
Synthesizer while JP1 2-3 disconnects the internal Synthesizer
and passes the external input to U4-4.
NOTE - If the transmitter is operated in a combined mode, refer
to the combiner Technical Manual for more information on the
RF drive system.
A.6.10
Frequency Monitor Output
Inverter U3-5 provides an output signal to a frequency monitor
or counter. Resistor R17 sets the output impedance at 50 Ohms.
The frequency monitor output signal, at BNC connector J5, will
be a 4-4.5 Volt peak-to-peak square wave at the transmitter
operating frequency when the load impedance is 50 Ohms. This
RF signal can be used as an oscilloscope external RF sync signal
when making other RF measurements.
A.6.11
Synthesizer SYNC Circuit
The function of this circuit is to synchronize the Synthesizer
Interface board RF output with a RF combiner current sample
during any VSWR fault condition. This RF SYNC switching is
controlled by the VSWR logic circuits on the Output Monitor
board.
A.6.11.1 Combiner Current Sample
The combiner output current sample from T4, is brought to the
Synthesizer Interface board at J3-1. R37 provides a 100-Ohm
input impedance.
888-2339-002 A-5
WARNING: Disconnect primary power prior to servicing.