Specifications

4-2 888-2500-001 5/2/2013
WARNING: Disconnect primary power prior to servicing.
DAX-1/DAX-3
Section 4 Theory of Operation
4.2.1.3 Field Programmable Gate Array (FPGA)
The Field Programmable Gate Array FPGA on the Exciter will perform all the real time
processing of the input serial data, all correction functions, control the turn on/off of the
PA modules, provide status information to the DSP, and distribute the Audio and PDM
clock to the PDM drive circuitry.
4.2.1.4 Audio Input Data Analog/IBOC
Input audio data is received from the external interface board with an input level of +/-
10Vdc maximum, and is selectable between analog and IBOC paths as well as AC or
DC coupling. The audio data is filtered, scaled, converted to digital, and input to the
FPGA for processing. Scaling of the audio is performed with an adjustable pot,
controlling the gain of the input, with a gain range of 0 to +2Vdc maximum at the input
to the A/D.
Figure 4-1
Audio Flow Block Diagram
4.2.1.5 Analog Power Supply Sense Input
To compensate for amplitude fluctuations due to power supply variation, the 300Vdc
power supply is sensed and used as an amplitude scale factor.