Specifications

Section 2: PCB Installation and Startup
2-6 ◆ Section 2: PCB Installation and Startup Aspire S Hardware Manual
Central Processing Unit (CPU) PCB (Figure 2-3)
The CPU, which is pre-installed, controls all the functions and operations of the Aspire system using the
system software loaded into the CPU memory. One 32-bit CPU is installed in the system cabinet.
The CPU provides the following:
● Accomodates up to 34 ports (8 trunks x 26 extensions)
● 8 digital station connections
A 2PGDAD module cannot be connected to port 1 or port 2.
● 2 analog station connections (no Message Wait lamping)
● 4 diagnostic LEDs which indicate the status of various system functions
During normal operation, the “LD2” LED will be flashing. The remaining LEDs can flash on or
off depending on the current system operation.
● Time Switch (383 ch)
● Digital Phase Locked Loop (DPLL): digital phase synchronization loop
● SFLM Generation
● DSP (Digital Signal Processor: provides C-Channel control
● Tone Generation
● DTMF Tone Sender/Receiver
● System Tone Sender
● MFC Tone Sender
● MF Signal Sender (Sends caller information to CO for E911)
● Call Progress Tone Detector
● C-Channel Control
● Time Switch control
● HDLC (High-Level Data Link Control) Packet Proceessing
● Conference; 32 Channels
● Caller ID Receiver/Generation; 16 Channels
● A load button which is used for initial system startup or when upgrading system software
● One Serial Port (requires null modem/cross-over cable)
● One Compact Flash Card Slot
● One Audio Input Terminal (external MOH/BGM source)
● General Purpose Control Terminal
● Hold Tone Transmit
● IP
● Real Time Clock (tolerance 30 seconds/month)
● Internal MOH Generation
● One Connector for PAL EPROM
● One lithium battery (Sony CR2032 or equivalent) which provides battery back-up of
system data and RAM memory for approximately 30 months
● TAPI 1.x / TAPI 2 Support