User guide

2: Software Development for the ICP
DC 900-1338I 39
Note
The stack spaces are defined in the linker specification file
freeway/icpcode/proto_kit/icpnnnn
1
/sps_nnnn.spc.
2.4.3 Exception Vector Table
On the 68xxx, interrupts and traps are processed through an exception vector table. The
68xxx vector base register points to the exception vector table, which contains 256 long-
word (four-byte) vectors. The vector base register is not accessible in user state, so
OS/Impact provides the base address of the exception vector table in its system address
table. (See the OS/Impact Programmer Guide.)
The MC68000 Family Reference Manual (Motorola) lists vector assignments as defined
by the 68xxx CPU. Tabl e 2 –1 lists the vectors that are reserved for use by Protogate’s
system software.
To install an interrupt service routine (ISR) for a particular device, multiply the vector
number by four to obtain the vector offset, add the offset to the base address of the
exception vector table, and store your ISR entry point at the resulting address.
When the device generates an interrupt, it supplies the 68xxx CPU with the eight-bit
vector number, which the CPU multiplies by four to obtain a vector offset, then adds
the contents of the vector base register to obtain the vector address at which your ISR
entry point is stored. When interrupt servicing is complete, the ISR must terminate
with a “return from ISR” (
s_iret) system call (described in the OS/Impact Programmer
Guide) if the interrupt requires that system services be invoked. Otherwise, a return
from exception (RTE) is sufficient.
1. nnnn stands for 2424, 2432, or 6000.