User guide

DC 900-1338I 115
Chapter
7
Host/ICP Interface
Note
From the ICPs perspective, the host processor can be either the
server processor of the Freeway in which the ICP resides, or the
processor of the client computer in which the ICP is embedded. In
this chapter, the terms ICP host processor, ICPs host, and
host/ICP interface reflect this perspective.
This chapter describes the interface between the ICPs host processor and an ICP. This
interface will be referred to as the host/ICP interface. It is managed by an XIO inter-
face which runs on the ICP, in the OS/Impact environment, and provides a queue-
driven, non-blocking interface to the host processor. Section 7.4 on page 135 gives
details of XIO.
7.1 ICPs Host Interface Protocol
Communications between the ICPs host and the ICPs is performed by the hosts
driver,
icp.c, and the ICPs driver, XIO. Information concerning any data transfers
between the two is passed through a Protocol eXchange Region (PXR).
The PXR for the ICP6000 is implemented via a hardware device that has 16 byte wide
registers called mailboxes. The ICPs host sees these registers as bytes on word bound-
aries, while the ICP sees them as consecutive bytes. One of these registers is used for
host-to-ICP commands; when the host writes to this register, an interrupt is generated