SIM8300G-M2 Hardware Design V1.01 Draft

SIM8300G-M2 Hardware Design V1.01
www.simcom.com
17
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77
I2S_MCLK
60
P3
DO
I2S master clock
I2C interface
I2C_SDA
68
P3
DIO
I2C data signal
1.8V voltage domain,
Internal pulled up to
1.8V. If unused, please
keep open
I2C_SCL
38
P3
DO
I2C clock signal
Coex interface
2
COEX1*
(COEX_RX*)
64
P3
DI
Wireless coexistence of
WWAN and WiFi/BT,
based on BT-sig
coexistence protocol
If unused, please keep
open
COEX2*
(COEX_TX*)
62
P3
DO
Wireless coexistence of
WWAN and WiFi/BT,
based on BT-sig
coexistence protocol
WL_TX_EN*
65
P3
DI
WiFi 5G TX indicator
If unused, please keep
open
LAA_TX_EN*
63
P3
DO
n79 TX indicator
If unused, please keep
open
Other pins
LED1#*
10
P3
OD
The module status indicator
via LED devices
Active low
DPR*
25
P3
DI
Dynamic power reduction
H: Max transmitting power
will not be reduced (default)
L: Max transmitting power
will be reduced
Notch
Notch
12, 13,
14, 15,
16, 17,
18, 19
Notch
1. “*” means under development.
2. Please confirm with SIMCom for the detail design about antenna control and coex interface.
3. The RFFE signals are multiplexed with ANTCTL2 and ANTCTL3.
NOTE