SIM8300G-M2 Hardware Design V1.01 Draft

SIM8300G-M2 Hardware Design V1.01
www.simcom.com
16
/
77
negative
data rate up to 8Gbps.
If unused, please keep
open
PETp0
43
AO
PCIe transmit data positive
PERn0
47
AI
PCIe receive data negative
PERp0
49
AI
PCIe receive data positive
REFCLKN
53
AIO
PCIe reference clock
negative
REFCLKP
55
AIO
PCIe reference clock
positive
PCIe assistant interface
PERST#
50
DI
PCIe reset signal
Active low
3.3V voltage domain,
CLKREQ# and
PEWAKE# required pull
up external,
Default as EP mode,
If unused, please keep
open
CLKREQ#
52
DIO
PCIe reference clock
request signal
Active low
PEWAKE#
54
DIO
PCIe wake up control
Active low
(U)SIM interface
(U)SIM1_PWR
36
PO
Power supply for (U)SIM1
card
1.8/3.0V voltage
domain,
(U)SIM interfaces
should be protected
against ESD，
If unused, please keep
open
(U)SIM1_DATA
34
P4
DIO
(U)SIM1 card data, which
has been pulled up to
(U)SIM1_VDD via a 20KR
resistor internally
(U)SIM1_CLK
32
P4
DO
(U)SIM1 clock signal
(U)SIM1_RESET
30
P4
DO
(U)SIM1 reset control
(U)SIM1_DET
66
P3
DI
(U)SIM1 card detect, which
has been pulled up to
VDD_P3 via a 470KR
resistor internally
MMW control signal interface
VQTM_1P9
48
PO
Internally power supply
output for MMW only
QTM3_PON
46
P3
DO
MMW GPIO control pin 3
1.8V voltage domain, All
lines of interface should
be protected against
ESD
QTM2_PON
44
P3
DO
MMW GPIO control pin 2
QTM1_PON
42
P3
DO
MMW GPIO control pin 1
QTM0_PON
40
P3
DO
MMW GPIO control pin 0
Antenna control interface
2
ANTCTL0
59
P3
DO
Antenna tuner control0
1.8V voltage domain. If
unused, please keep
open
ANTCTL1
61
P3
DO
Antenna tuner control1
ANTCTL 2
(RFFE_SDATA)
3
58
P3
DO
(DIO)
Antenna tuner control2
(Antenna tuner MIPI
DATA)
3
ANTCTL3
(RFFE_SCLK)
3
56
P3
DO
Antenna tuner control3
(Antenna tuner MIPI CLK)
3
I2S interface
I2S_CLK
20
P3
DO
I2S clock output
1.8V voltage domain,
also can be used as
PCM interface, If
unused, please keep
open
I2S_RX
22
P3
DI
I2S data input
I2S_TX
24
P3
DO
I2S data output
I2S_WA
28
P3
DO
I2S word alignment select
(L/R)