Hardware Design
Table Of Contents
- Contents
- Table Index
- Revision History
- 1 Introduction
- 2 Package Information
- 3 Interface Application
- 4 Antenna Interfaces
- 5 Electrical Specifications
- 6 Top and Bottom View of Module
- 7 Label description Information
- 8 Packaging
- Appendix
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SIM8200EA-M2 card Hardware Design _V1.01 25 2019-06-27
Table 10: RESET pin electronic characteristic
Symbol
Description
Min.
Typ.
Max.
Unit
T
reset
The active low level impulse time on RESET_N pin to
reset Module
TBD TBD TBD ms
V
IH
Input high level voltage 1.17 1.8 2.1 V
V
IL
Input low level voltage -0.3 0 0.8 V
3.5 WoWWAN#
The WoWWAN# pin is an open collector signal which can be used as an interrupt signal to the host.
Normally it will keep high logic level until certain conditions such as receiving SMS, voice call
(CSD, video) or URC reporting, then WoWWAN# will change to low logic level to inform the host
(client PC), the pulse time is 1 second.
HIGH
LOW
1s
WoWWAN#
Figure 11: WOWWAN# behaviour
（
SMS and URC report
）
WAKE_ON_WWAN Reference circuit is recommended in the following figure.
SIM8200EA-M2
VCC From Host
10 ~100K
HOST
Interrupt input
BB Chip
WoWWAN#
4.7K
47K
Figure 12: WOWWAN# behaviour
（
SMS and URC report
）
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