Hardware Design V1.00

Table Of Contents
Smart Machine Smart Decision
4.8.4. Primary PCM (2048KHz PCM clock)
SIM2000S also supports 2.048 MHz PCM data and sync timing for
υ-law codec. This is called the primary PCM
interface. User can use AT command to take the mode you want as discussed above.
Figure 32: Synchrony timing
Figure 33: EXT CODEC to MODULE timing
Figure 34: MODULE to EXT CODEC timing
Table 23: Timing parameters
Parameter Description Min Typ Max Unit
T(sync) PCMSYNC cycle time 125 s
T(synca) PCMSYNC high time 400 500 ns
T(syncd) PCMSYNC low time 124.5 s
SIM2000S_Hardware_Design_V1.00 37 2014-02-27