Hardware Design V1.00

Table Of Contents
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Table 20: PCM specification
Parameter Specification
Line Interface Format Linear(Fixed)
Data length 8/16bits
PCM Clock/Sync Source Slave/Master Mode
PCM Clock Rate 256Khz2.048Mhz
Data Ordering MSB/LSB both support
4.8.1. PCM Multiplexing Function
The following table shows the detailed multiplexing function.
Table 21: PCM multiplexing function
Pin name Pin number Mode 0(default) Mode 1
PCMCLK 11 PCMCLK GPIO8
PCMIN 12 PCMIN GPIO9
PCMOUT 13 PCMOUT GPIO10
PCMSYNC 14 PCMSYNC GPIO11
Note: Multiplexing function needs different software supply.
4.8.2. PCM Interface
Refer to the following figure for PCM design:
Figure 28: PCM reference circuit
4.8.3. Auxiliary PCM (128 KHz PCM clock)
u-law coding is supported by the auxiliary PCM. The auxiliary codec port operates with standard long-sync
timing and a 128 KHz clock. The PCMSYNC runs at 8 KHz with 50% duty cycle. Most u-law codec support the
128 KHz clock.
Figure 29: Synchrony timing
SIM2000S_Hardware_Design_V1.00 35 2014-02-27