Specifications

SIM7912&SIM7906 Hardware Design V1.02
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Figure 20: I2S timing
Table 24: I2S timing parameters
3.9.2 I2S Reference Circuit
The following figure shows the external codec reference design.
I2S_MCLK
22pF(NC)
ADCDAT1
LRCK1
BCLK1
DACDAT1
MCLK
SCL
SDA
IN 1P
MICBIAS1
LOUTR/N
MIC
NAU8810
2.2K
2.2uF
I2C1_SCL
I2C1_SDA
I2S_RX
I2S_TX
I2S_WA
I2S_CLK
Moudle
22pF(NC)22pF(NC) 22pF(NC)22pF(NC)
LOUTL/P
0R
0R
33pF
Speaker
33pF
LESD8LH5.0CT5G LESD8LH5.0CT5G
1uF
1uF
1.8V
1.8V
3.3V
1.8V
AVDD
CPVDD
DBVDD
MICVDD
DCVDD
1.2V
DACREF
1.8V
VDD_EXT
2.2K
2.2K
Figure 21: Audio codec reference circuit
Signal
Parameter
Description
Min.
Typ.
Max.
Unit
I2S_MCLK
Frequency
Frequency
–
12.288
12.288
MHz
T
Clock period
81.380
81.380
–
ns
t(HC)
Clock high
0.45T
–
0.55T
ns
t(LC)
Clock low
0.45T
–
0.55T
ns
I2S_CLK
Frequency
Frequency
-
1.536
-
MHz
T
Clock period
-
651.04
-
ns
t(HC)
Clock high
0.45T
–
0.55T
ns
t(LC)
Clock low
0.45T
–
0.55T
ns
I2S_WS
t(sr)
DIN/DOUT and WS input setup
time
16.276
–
–
ns
t(hr)
DIN/DOUT and WS input hold time
0
–
–
ns
t(dtr)
DIN/DOUT and WS output delay
–
–
65.10
ns
t(htr)
DIN/DOUT and WS output hold
time
0
–
–
ns