Specifications

SIM7912&SIM7906 Hardware Design V1.02
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Module
HOST
100nF
PCIe_REFCLK_M
PCIe_REFCLK_P
PCIe_ RXM
PCIe_ RXP
PCIe_ CLKM
PCIe_ CLKP
PCIe_WAKE
PCIe_RST
PCIe_CLKREQ
PCIe_TX _M
PCIe_TX _P
PCIe_RX _M
PCIe_RX _P
PCIe_ TXM
PCIe_ TXP
100nF
100nF
100nF
PCIe_RST
PCIe_WAKE
PCIe_CLKREQ
VDD_EXT
100K
100K
100K
Close to AP
USB_DP
USB_DM
USB_DP
USB_DM
0R
0R
Figure 17: PCIe interface reference circuit (EP)
1. USB is required because PCIe does not support features such as firmware upgrade, GNSS NMEA
output and software debugging. Firmware upgrade must be over USB 2.0, while GNSS NMEA output
and software debugging can be over USB 2.0/3.0 (USB 2.0 is recommended)
2. All the PCIe level of module is 1.8V. If it communicates with the 3.3V serial port level, a level
conversion chip needs to be added in the middle.
3. The Endpoint mode of PCIe is under the development.
3.7 SDIO Interface
Module provides one SDIO interface which supports SD 3.0 protocol and eMMC*. The following table
shows the pin definition.
Table 17: Definition of SDIO interface
Pin name
Pin no.
I/O
Functional description
Comment
NOTE