User's Manual
Table Of Contents
- Contents
- Table Index
- Figure Index
- 1Introduction
- 1.1Product Outline
- 1.2Hardware Interface Overview
- 1.3Hardware Block Diagram
- 1.4Functional Overview
- 2Package Information
- 2.1.Pin Assignment Overview
- 2.2.Pin Description
- 2.3.Mechanical Information
- 2.4.Footprint Recommendation
- 3Interface Application
- 3.1Power Supply
- 3.3UART Interface
- 3.4USB Interface
- 3.5SIM Interface
- 3.6PCM Interface
- 3.7I2C Interface
- 3.8SPI Interface
- 3.9Network status
- 3.10ADC interface
- 3.11LDO output
- 3.12USB_BOOT Interface
- 3.13GPIO Interface
- 3.14 RF control Interface
- 3.15Force USB Download Interface
- 4RF Specifications
- 4.1LTE RF Specifications
- 4.2LTE Antenna Design Guide
- 4.3GNSS
- 4.4RF traces note
- 5 Electrical Specifications
- 5.1Absolute maximum ratings
- 5.2Operating conditions
- 5.3Operating Mode
- 5.4Current Consumption
- 5.5ESD Notes
- 6 SMT Production Guide
- 6.1Top and Bottom View of SIM7090G
- 6.2Label Information
- 6.3Typical SMT Reflow Profile
- 6.5Baking
- 6.6Stencil Foil Design Recommendation
- 7 Packaging
- 7.1Tray packaging
- 8 Appendix
- 8.1Coding Schemes and Maximum Net Data Rates over Air
- 8.2Related Documents
- 8.3Terms and Abbreviations
- 8.4Safety Caution
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3.3.1. UART Design Guide
The following figures show the reference design.
Figure 10: UART full modem
Driving the host DTR to low level will wake up the module.
AP_READY will detect the sleep state of the host (can be configured to high level or low level
detection).
Table 13: UART electronic characteristic
Symbol
Description
Min.
Typ.
Max.
Unit
V
IH
UART input high level voltage
1.17
1.8
2.1
V
V
IL
UART input low level voltage
-0.3
0
0.63
V
V
OH
UART output high level voltage
1.35
1.8
1.8
V
V
OL
UART output low level voltage
0
0
0.45
V
The SIM7090G UART is 1.8V voltage interface. If user’s UART application circuit is 3.3V voltage interface,
the level shifter circuits should be used for voltage matching. The following figure shows the voltage
matching reference design.