User manual

TABLE OF CONTENTS SSD-PXXX(I)-3100 DATA SHEET
SILICONSYSTEMS PROPRIETARY
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3100P-06DSR PAGE IV FEBRUARY 2, 2009
Attribute Memory Description and Operation........................................................... 23
Attribute Memory Read Operations............................................................................ 23
Attribute Memory Write Operations............................................................................ 24
Attribute Memory Map................................................................................................ 25
Card Information Structure......................................................................................... 26
Configuration Option Register (200h)......................................................................... 37
Configuration and Status Register (202h).................................................................. 38
Pin Placement Register (204h) .................................................................................. 39
Socket and Copy Register (206h) .............................................................................. 40
Common Memory Description and Operation .......................................................... 41
Common Memory Read Operations........................................................................... 41
Common Memory Write Operations........................................................................... 41
I/O Space Description and Operation ........................................................................ 42
I/O Space Read Operations ....................................................................................... 42
I/O Space Write Operations ....................................................................................... 42
ATA and True IDE Register Decoding ........................................................................ 43
Memory-Mapped Register Decoding.......................................................................... 43
Independent I/O Mode Register Decoding................................................................. 44
Primary and Secondary I/O Mapped Register Decoding ........................................... 45
Task File Register Specification ................................................................................. 46
ATA Registers............................................................................................................... 47
Data Register ............................................................................................................. 47
Error Register............................................................................................................. 47
Feature Register......................................................................................................... 48
Sector Count Register................................................................................................ 49
Sector Number Register............................................................................................. 50
Cylinder Low Register ................................................................................................ 51
Cylinder High Register ............................................................................................... 52
Drive/Head Register................................................................................................... 53