User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 808
www.energymicro.com
Bit Name Reset Access Description
11 SEGD3H 0 R LCD_SEGD3H Register Busy
Set when the value written to LCD_SEGD3H is being synchronized.
10 SEGD2H 0 R LCD_SEGD2H Register Busy
Set when the value written to LCD_SEGD2H is being synchronized.
9 SEGD1H 0 R LCD_SEGD1H Register Busy
Set when the value written to LCD_SEGD1H is being synchronized.
8 SEGD0H 0 R LCD_SEGD0H Register Busy
Set when the value written to LCD_SEGD0H is being synchronized.
7 SEGD3L 0 R LCD_SEGD3L Register Busy
Set when the value written to LCD_SEGD3L is being synchronized.
6 SEGD2L 0 R LCD_SEGD2L Register Busy
Set when the value written to LCD_SEGD2L is being synchronized.
5 SEGD1L 0 R LCD_SEGD1L Register Busy
Set when the value written to LCD_SEGD1L is being synchronized.
4 SEGD0L 0 R LCD_SEGD0L Register Busy
Set when the value written to LCD_SEGD0L is being synchronized.
3 AREGB 0 R LCD_AREGB Register Busy
Set when the value written to LCD_AREGB is being synchronized.
2 AREGA 0 R LCD_AREGA Register Busy
Set when the value written to LCD_AREGA is being synchronized.
1 BACTRL 0 R LCD_BACTRL Register Busy
Set when the value written to LCD_BACTRL is being synchronized.
0 CTRL 0 R LCD_CTRL Register Busy
Set when the value written to LCD_CTRL is being synchronized.
33.5.22 LCD_SEGD4H - Segment Data High Register 4 (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x0B4
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x00
Access
RW
Name
SEGD4H
Bit Name Reset Access Description
31:8 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
7:0 SEGD4H 0x00 RW COM0 Segment Data High
This register contains segment data for segment lines 32-39 for COM0.
33.5.23 LCD_SEGD5H - Segment Data High Register 5 (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .