User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 803
www.energymicro.com
33.5.11 LCD_IEN - Interrupt Enable Register
Offset Bit Position
0x028
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
Access
RW
Name
FC
Bit Name Reset Access Description
31:1 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0 FC 0 RW Frame Counter Interrupt Enable
Set to enable interrupt on frame counter interrupt flag.
33.5.12 LCD_SEGD0L - Segment Data Low Register 0 (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x040
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x00000000
Access
RW
Name
SEGD0L
Bit Name Reset Access Description
31:0 SEGD0L 0x00000000 RW COM0 Segment Data Low
This register contains segment data for segment lines 0-31 for COM0.
33.5.13 LCD_SEGD1L - Segment Data Low Register 1 (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .