User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 800
www.energymicro.com
Bit Name Reset Access Description
17:16 FCPRESC 0x0 RW Frame Counter Prescaler
These bits controls the prescaling value for the Frame Counter input clock.
Value Mode Description
0 DIV1 CLK
FC
= CLK
FRAME
/ 1
1 DIV2 CLK
FC
= CLK
FRAME
/ 2
2 DIV4 CLK
FC
= CLK
FRAME
/ 4
3 DIV8 CLK
FC
= CLK
FRAME
/ 8
15:9 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
8 FCEN 0 RW Frame Counter Enable
When this bit is set, the frame counter is enabled.
7 ALOGSEL 0 RW Animate Logic Function Select
When this bit is set, the animation registers are AND'ed together. When this bit is cleared, the animation registers are OR'ed together.
Value Mode Description
0 AND AREGA and AREGB AND'ed
1 OR AREGA and AREGB OR'ed
6:5 AREGBSC 0x0 RW Animate Register B Shift Control
These bits controls the shift operation that is performed on Animation register B.
Value Mode Description
0 NOSHIFT No Shift operation on Animation Register B
1 SHIFTLEFT Animation Register B is shifted left
2 SHIFTRIGHT Animation Register B is shifted right
4:3 AREGASC 0x0 RW Animate Register A Shift Control
These bits controls the shift operation that is performed on Animation register A.
Value Mode Description
0 NOSHIFT No Shift operation on Animation Register A
1 SHIFTLEFT Animation Register A is shifted left
2 SHIFTRIGHT Animation Register A is shifted right
2 AEN 0 RW Animation Enable
When this bit is set, the animate function is enabled.
1 BLANK 0 RW Blank Display
When this bit is set, all segment output waveforms are configured to blank the LCD display. The Segment Data Registers are not
affected when writing this bit.
Value Description
0 Display is not "blanked"
1 Display is "blanked"
0 BLINKEN 0 RW Blink Enable
When this bit is set, the Blink function is enabled. Every "ON" segment will alternate between on and off at every Frame Counter Event.
33.5.5 LCD_STATUS - Status Register
Offset Bit Position
0x010
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
0
0x0
Access
R R
Name
BLINK
ASTATE