User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 80
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8.7.10 DMA_CHREQMASKC - Channel Request Mask Clear Register
Offset Bit Position
0x024
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
0 0 0 0 0 0 0 0 0 0 0 0
Access
W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1
Name
CH11REQMASKC CH10REQMASKC
CH9REQMASKC CH8REQMASKC CH7REQMASKC CH6REQMASKC CH5REQMASKC CH4REQMASKC CH3REQMASKC CH2REQMASKC CH1REQMASKC CH0REQMASKC
Bit Name Reset Access Description
31:12 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
11 CH11REQMASKC 0 W1 Channel 11 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
10 CH10REQMASKC 0 W1 Channel 10 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
9 CH9REQMASKC 0 W1 Channel 9 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
8 CH8REQMASKC 0 W1 Channel 8 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
7 CH7REQMASKC 0 W1 Channel 7 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
6 CH6REQMASKC 0 W1 Channel 6 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
5 CH5REQMASKC 0 W1 Channel 5 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
4 CH4REQMASKC 0 W1 Channel 4 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
3 CH3REQMASKC 0 W1 Channel 3 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
2 CH2REQMASKC 0 W1 Channel 2 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
1 CH1REQMASKC 0 W1 Channel 1 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.
0 CH0REQMASKC 0 W1 Channel 0 Request Mask Clear
Write to 1 to enable peripheral requests for this channel.