User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 796
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33.4 Register Map
The offset register address is relative to the registers base address.
Offset Name Type Description
0x000 LCD_CTRL RW Control Register
0x004 LCD_DISPCTRL RW Display Control Register
0x008 LCD_SEGEN RW Segment Enable Register
0x00C LCD_BACTRL RW Blink and Animation Control Register
0x010 LCD_STATUS R Status Register
0x014 LCD_AREGA RW Animation Register A
0x018 LCD_AREGB RW Animation Register B
0x01C LCD_IF R Interrupt Flag Register
0x020 LCD_IFS W1 Interrupt Flag Set Register
0x024 LCD_IFC W1 Interrupt Flag Clear Register
0x028 LCD_IEN RW Interrupt Enable Register
0x040 LCD_SEGD0L RW Segment Data Low Register 0
0x044 LCD_SEGD1L RW Segment Data Low Register 1
0x048 LCD_SEGD2L RW Segment Data Low Register 2
0x04C LCD_SEGD3L RW Segment Data Low Register 3
0x050 LCD_SEGD0H RW Segment Data High Register 0
0x054 LCD_SEGD1H RW Segment Data High Register 1
0x058 LCD_SEGD2H RW Segment Data High Register 2
0x05C LCD_SEGD3H RW Segment Data High Register 3
0x060 LCD_FREEZE RW Freeze Register
0x064 LCD_SYNCBUSY R Synchronization Busy Register
0x0B4 LCD_SEGD4H RW Segment Data High Register 4
0x0B8 LCD_SEGD5H RW Segment Data High Register 5
0x0BC LCD_SEGD6H RW Segment Data High Register 6
0x0C0 LCD_SEGD7H RW Segment Data High Register 7
0x0CC LCD_SEGD4L RW Segment Data Low Register 4
0x0D0 LCD_SEGD5L RW Segment Data Low Register 5
0x0D4 LCD_SEGD6L RW Segment Data Low Register 6
0x0D8 LCD_SEGD7L RW Segment Data Low Register 7
33.5 Register Description
33.5.1 LCD_CTRL - Control Register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .