User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 739
www.energymicro.com
31.4 Register Map
The offset register address is relative to the registers base address.
Offset Name Type Description
0x000 AES_CTRL RW Control Register
0x004 AES_CMD W1 Command Register
0x008 AES_STATUS R Status Register
0x00C AES_IEN RW Interrupt Enable Register
0x010 AES_IF R Interrupt Flag Register
0x014 AES_IFS W1 Interrupt Flag Set Register
0x018 AES_IFC W1 Interrupt Flag Clear Register
0x01C AES_DATA RW DATA Register
0x020 AES_XORDATA RW XORDATA Register
0x030 AES_KEYLA RW KEY Low Register
0x034 AES_KEYLB RW KEY Low Register
0x038 AES_KEYLC RW KEY Low Register
0x03C AES_KEYLD RW KEY Low Register
0x040 AES_KEYHA RW KEY High Register
0x044 AES_KEYHB RW KEY High Register
0x048 AES_KEYHC RW KEY High Register
0x04C AES_KEYHD RW KEY High Register
31.5 Register Description
31.5.1 AES_CTRL - Control Register
Offset Bit Position
0x000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
Access
RW
RW
RW
RW
RW
RW
Name
BYTEORDER
XORSTART
DATASTART
KEYBUFEN
AES256
DECRYPT
Bit Name Reset Access Description
31:7 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
6 BYTEORDER 0 RW Configure byte order in data and key registers
When set, the byte orders in the data and key registers are swapped before and after encryption/decryption.
5 XORSTART 0 RW AES_XORDATA Write Start
Set this bit to start encryption/decryption when DATA3 is written through AES_XORDATA.
4 DATASTART 0 RW AES_DATA Write Start
Set this bit to start encryption/decryption when DATA3 is written through AES_DATA.
3 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2 KEYBUFEN 0 RW Key Buffer Enable