User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 714
www.energymicro.com
Bit Name Reset Access Description
0 EN 0 RW Channel 1 Enable
Enable/disable channel 1.
29.5.5 DACn_IEN - Interrupt Enable Register
Offset Bit Position
0x010
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
Access
RW
RW
RW
RW
Name
CH1UF
CH0UF
CH1
CH0
Bit Name Reset Access Description
31:6 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
5 CH1UF 0 RW Channel 1 Conversion Data Underflow Interrupt Enable
Enable/disable channel 1 data underflow interrupt.
4 CH0UF 0 RW Channel 0 Conversion Data Underflow Interrupt Enable
Enable/disable channel 0 data underflow interrupt.
3:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 CH1 0 RW Channel 1 Conversion Complete Interrupt Enable
Enable/disable channel 1 conversion complete interrupt.
0 CH0 0 RW Channel 0 Conversion Complete Interrupt Enable
Enable/disable channel 0 conversion complete interrupt.
29.5.6 DACn_IF - Interrupt Flag Register
Offset Bit Position
0x014
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
Access
R
R
R
R
Name
CH1UF
CH0UF
CH1
CH0
Bit Name Reset Access Description
31:6 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
5 CH1UF 0 R Channel 1 Data Underflow Interrupt Flag
Indicates channel 1 data underflow.
4 CH0UF 0 R Channel 0 Data Underflow Interrupt Flag
Indicates channel 0 data underflow.
3:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 CH1 0 R Channel 1 Conversion Complete Interrupt Flag
Indicates channel 1 conversion complete.
0 CH0 0 R Channel 0 Conversion Complete Interrupt Flag