User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 712
www.energymicro.com
29.5.2 DACn_STATUS - Status Register
Offset Bit Position
0x004
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
Access
R
R
Name
CH1DV
CH0DV
Bit Name Reset Access Description
31:2 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
1 CH1DV 0 R Channel 1 Data Valid
This bit is set high when CH1DATA is written and is set low when CH1DATA is used in conversion.
0 CH0DV 0 R Channel 0 Data Valid
This bit is set high when CH0DATA is written and is set low when CH0DATA is used in conversion.
29.5.3 DACn_CH0CTRL - Channel 0 Control Register
Offset Bit Position
0x008
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0x0
0
0
0
Access
RW
RW
RW
RW
Name
PRSSEL
PRSEN
REFREN
EN
Bit Name Reset Access Description
31:8 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
7:4 PRSSEL 0x0 RW Channel 0 PRS Trigger Select
Select Channel 0 PRS input channel.
Value Mode Description
0 PRSCH0 PRS ch 0 triggers channel 0 conversion.
1 PRSCH1 PRS ch 1 triggers channel 1 conversion.
2 PRSCH2 PRS ch 2 triggers channel 2 conversion.
3 PRSCH3 PRS ch 3 triggers channel 3 conversion.
4 PRSCH4 PRS ch 4 triggers channel 4 conversion.
5 PRSCH5 PRS ch 5 triggers channel 5 conversion.
6 PRSCH6 PRS ch 6 triggers channel 6 conversion.
7 PRSCH7 PRS ch 7 triggers channel 7 conversion.
8 PRSCH8 PRS ch 8 triggers channel 8 conversion.
9 PRSCH9 PRS ch 9 triggers channel 9 conversion.
10 PRSCH10 PRS ch 10 triggers channel 10 conversion.
11 PRSCH11 PRS ch 11 triggers channel 11 conversion.
3 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
2 PRSEN 0 RW Channel 0 PRS Trigger Enable
Select Channel 0 conversion trigger.
Value Description
0 Channel 0 is triggered by CH0DATA or COMBDATA write