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...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 688
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Table 28.2. ADC Differential Conversion
Results
Input/Reference
Binary Hex value
0.5 011111111111 7FF
0.25 001111111111 3FF
1/2048 000000000001 001
0 000000000000 000
-1/2048 111111111111 FFF
-0.25 101111111111 BFF
-0.5 100000000000 800
28.3.7.6 Resolution
The ADC gives out 12-bit results, by default. However, if full 12-bit resolution is not needed, it is possible
to speed up the conversion by selecting a lower resolution (N = 6 or 8 bits). For more information on the
accuracy of the ADC, the reader is referred to the electrical characteristics section for the device.
28.3.7.7 Oversampling
To achieve higher accuracy, hardware oversampling can be enabled individually for each mode (Set RES
in ADCn_SINGLECTRL/ADCn_SCANCTRL to 0x3). The oversampling rate (OVSRSEL in ADCn_CTRL)
can be set to any integer power of 2 from 2 to 4096 and the configuration is shared between the scan
and single sample mode (OVSRSEL field in ADCn_CTRL).
With oversampling, each selected input is sampled a number (given by the OVSR) of times, and the
results are filtered by a first order accumulate and dump filter to form the end result. The data presented in
the ADCn_SINGLEDATA and ADCn_SCANDATA registers are the direct contents of the accumulation
register (sum of samples). However, if the oversampling ratio is set higher than 16x, the accumulated
results are shifted to fit the MSB in bit 15 as shown in Table 28.3 (p. 688) .
Table 28.3. Oversampling Result Shifting and Resolution
Oversampling setting # right shifts Result Resolution # bits
2x 0 13
4x 0 14
8x 0 15
16x 0 16
32x 1 16
64x 2 16
128x 3 16
256x 4 16
512x 5 16
1024x 6 16
2048x 7 16
4096x 8 16