User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 66
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Bit Name Description
Note
You must set dst_size to contain the same value that src_size contains.
[27:26] src_inc Set the bits to control the source address increment. The address increment depends on the
source data width as follows:
Source data width = byte b00 = byte.
b01 = halfword.
b10 = word.
b11 = no increment. Address remains set to the value that
the src_data_end_ptr memory location contains.
Source data width = halfword b00 = reserved.
b01 = halfword.
b10 = word.
b11 = no increment. Address remains set to the value that
the src_data_end_ptr memory location contains.
Source data width = word b00 = reserved.
b01 = reserved.
b10 = word.
b11 = no increment. Address remains set to the value that
the src_data_end_ptr memory location contains.
[25:24] src_size Set the bits to match the size of the source data:
b00 = byte
b01 = halfword
b10 = word
b11 = reserved.
[23:21] dst_prot_ctrl Set the bits to control the state of HPROT when the controller writes the destination data.
Bit [23] This bit has no effect on the DMA.
Bit [22] This bit has no effect on the DMA.
Bit [21] Controls the state of HPROT as follows:
0 = HPROT is LOW and the access is non-privileged.
1 = HPROT is HIGH and the access is privileged.
[20:18] src_prot_ctrl Set the bits to control the state of HPROT when the controller reads the source data.
Bit [20] This bit has no effect on the DMA.
Bit [19] This bit has no effect on the DMA.
Bit [18] Controls the state of HPROT as follows:
0 = HPROT is LOW and the access is non-privileged.
1 = HPROT is HIGH and the access is privileged.
[17:14] R_power Set these bits to control how many DMA transfers can occur before the controller rearbitrates.
The possible arbitration rate settings are:
b0000 Arbitrates after each DMA transfer.
b0001 Arbitrates after 2 DMA transfers.
b0010 Arbitrates after 4 DMA transfers.
b0011 Arbitrates after 8 DMA transfers.
b0100 Arbitrates after 16 DMA transfers.
b0101 Arbitrates after 32 DMA transfers.
b0110 Arbitrates after 64 DMA transfers.
b0111 Arbitrates after 128 DMA transfers.
b1000 Arbitrates after 256 DMA transfers.
b1001 Arbitrates after 512 DMA transfers.
b1010 - b1111 Arbitrates after 1024 DMA transfers. This means that no arbitration occurs
during the DMA transfer because the maximum transfer size is 1024.