User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 658
www.energymicro.com
25.5.27 LESENSE_CHx_TIMING - Scan configuration (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x2C0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
0xXX 0xXX 0xXX
Access
RW RW RW
Name
MEASUREDLY
SAMPLEDLY
EXTIME
Bit Name Reset Access Description
31:20 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
19:13 MEASUREDLY 0xXX RW Set measure delay
Configure measure delay. Sensor measuring is delayed for MEASUREDLY+1 EXCLK cycles.
12:6 SAMPLEDLY 0xXX RW Set sample delay
Configure sample delay. Sampling will occur after SAMPLEDLY+1 SAMPLECLK cycles.
5:0 EXTIME 0xXX RW Set excitation time
Configure excitation time. Excitation will last EXTIME+1 EXCLK cycles.
25.5.28 LESENSE_CHx_INTERACT - Scan configuration (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x2C4
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9 8 7 6 5 4 3 2 1 0
Reset
X X X
0xX 0xX
X
0xXXX
Access
RW RW RW RW RW RW RW
Name
ALTEX
SAMPLECLK
EXCLK
EXMODE
SETIF
SAMPLE
ACMPTHRES
Bit Name Reset Access Description
31:20 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
19 ALTEX X RW Use alternative excite pin
If set, alternative excite pin will be used for excitation
18 SAMPLECLK X RW Select clock used for timing of sample delay
Value Mode Description
0 LFACLK LFACLK will be used for timing
1 AUXHFRCO AUXHFRCO will be used for timing
17 EXCLK X RW Select clock used for excitation timing