User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 656
www.energymicro.com
Bit Name Reset Access Description
18 CHAIN X RW Enable state descriptor chaining
When set, descriptor in the next location will also be evaluated
17 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
16 SETIF X RW Set interrupt flag enable
Set interrupt flag when sensor state equals COMP
15 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
14:12 PRSACT 0xX RW Configure transition action
Configure which action to perform when sensor state equals COMP
DECCTRL_PRSCNT = 0
Mode Value Description
NONE 0 No PRS pulses generated
PRS0 1 Generate pulse on LESPRS0
PRS1 2 Generate pulse on LESPRS1
PRS01 3 Generate pulse on LESPRS0 and LESPRS1
PRS2 4 Generate pulse on LESPRS2
PRS02 5 Generate pulse on LESPRS0 and LESPRS2
PRS12 6 Generate pulse on LESPRS1 and LESPRS2
PRS012 7 Generate pulse on LESPRS0, LESPRS1 and LESPRS2
DECCTRL_PRSCNT = 1
NONE 0 Do not count
UP 1 Count up
DOWN 2 Count down
PRS2 4 Generate pulse on LESPRS2
UPANDPRS2 5 Count up and generate pulse on LESPRS2.
DOWNANDPRS2 6 Count down and generate pulse on LESPRS2.
11:8 NEXTSTATE 0xX RW Next state index
Index of next state to be entered if the sensor state equals COMP
7:4 MASK 0xX RW Sensor mask
Set bit X to exclude sensor X from evaluation.
3:0 COMP 0xX RW Sensor compare value
State transition is triggered when sensor state equals COMP
25.5.25 LESENSE_STx_TCONFB - State transition configuration B (Async
Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x204
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
X
0xX
0xX
0xX
0xX
Access
RW
RW
RW
RW
RW
Name
SETIF
PRSACT
NEXTSTATE
MASK
COMP
Bit Name Reset Access Description
31:17 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)