User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 655
www.energymicro.com
Bit Name Reset Access Description
5 CH5PEN 0 RW CH5 Pin Enable
4 CH4PEN 0 RW CH4 Pin Enable
3 CH3PEN 0 RW CH3 Pin Enable
2 CH2PEN 0 RW CH2 Pin Enable
1 CH1PEN 0 RW CH0 Pin Enable
0 CH0PEN 0 RW CH0 Pin Enable
25.5.23 LESENSE_POWERDOWN - LESENSE RAM power-down resgister
(Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x058
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
Access
RW
Name
RAM
Bit Name Reset Access Description
31:1 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
0 RAM 0 RW LESENSE RAM power-down
Shut off power to the LESENSE RAM. Once it is powered down, it cannot be powered up again
25.5.24 LESENSE_STx_TCONFA - State transition configuration A (Async
Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x200
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
X
X
0xX
0xX
0xX
0xX
Access
RW
RW
RW
RW
RW
RW
Name
CHAIN
SETIF
PRSACT
NEXTSTATE
MASK
COMP
Bit Name Reset Access Description
31:19 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)