User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 61
www.energymicro.com
Bit Field Value Description
[13:4] n_minus_1 N
1
Configures the controller to perform N DMA transfers, where N is a multiple of four
[3] next_useburst - When set to 1, the controller sets the chnl_useburst_set [C] bit to 1 after the
alternate transfer completes
1
Because the R_power field is set to four, you must set N to be a multiple of four. The value given by N/4 is the number of times
that you must configure the alternate data structure.
See Section 8.4.3.3 (p. 65) for more information.
Figure 8.5 (p. 61) shows a peripheral scatter-gather example.
Figure 8.5. Peripheral scatter-gather example
Copy from A in
memory, to Alternate
Request
Task A
Task B
Request
Copy from B in
memory, to Alternate
Request
Request
Copy from C in
memory, to Alternate
Task C
Copy from D in
memory, to Alternate
Task D
Peripheral scatter-gather transaction:
For all primary to alternate transitions,
the controller does not enter the
arbitration process and immediately
performs the DMA transfer that the
alternate channel control data structure
specifies.
1. Configure primary to enable the copy A, B, C, and D operations: cycle_ctrl = b110, 2
R
= 4, N = 16.
Initialization:
2. Write the prim ary source data in memory, using the structure shown in the following table.
cycle_ctrl = b111, 2
R
= 4, N = 3
cycle_ctrl = b111, 2
R
= 2, N = 8
cycle_ctrl = b111, 2
R
= 8, N = 5
cycle_ctrl = b001, 2
R
= 4, N = 4
src_data_end_ptr dst_data_end_ptr channel_cfg Unused
0x0A000000 0x0AE00000
0x0B000000 0x0BE00000
0x0C000000 0x0CE00000
0x0D000000 0x0DE00000
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXX
0xXXXXXXXXData for Task A
Data for Task B
Data for Task C
Data for Task D
Request
Request
Request
Prim ary Alternat e
dm a_done[C]
N = 3, 2
R
= 4
N = 8, 2
R
= 2
N = 5, 2
R
= 8
N = 4, 2
R
= 4
In Figure 8.5 (p. 61) :
Initialization 1. The host processor configures the primary data structure to operate in peripheral
scatter-gather mode by setting cycle_ctrl to b110. Because a data structure for a
single channel consists of four words then you must set 2
R
to 4. In this example,
there are four tasks and therefore N is set to 16.
2. The host processor writes the data structure for tasks A, B, C, and D to the
memory locations that the primary src_data_end_ptr specifies.
3. The host processor enables the channel.
The peripheral scatter-gather transaction commences when the controller receives a request on
dma_req[ ]. The transaction continues as follows: