User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 606
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In EXTCLKQUAD mode, the EDGE bit in PCNTn_CTRL inverts the direction of the counter (which is
automatically detected).
Note
The EDGE bit in PCNTn_CTRL has no effect in EXTCLKSINGLE mode.
24.3.8 PRS S0IN and S1IN Input
It is possible to receive input from PRS on both SOIN and S1IN by setting S0PRSEN or S1PRSEN in
PCNTn_INPUT. The PRS channel used can be selected using S0PRSSEL in PCNTn_INPUT.
24.3.9 Interrupts
The interrupt generated by PCNT uses the PCNTn_INT interrupt vector. Software must read the
PCNTn_IF register to determine which module interrupt that generated the vector invocation.
24.3.9.1 Underflow and Overflow Interrupts
The underflow interrupt flag (UF) is set when the counter counts down from 0. I.e. when the value of
the counter is 0 and a new pulse is received. The PCNTn_CNT register is loaded with the PCNTn_TOP
value after this event.
The overflow interrupt flag (OF) is set when the counter counts up from the PCNTn_TOP (reload) value.
I.e. if PCNTn_CNT = PCNTn_TOP and a new pulse is received. The PCNTn_CNT register is loaded
with the value 0 after this event.
24.3.9.2 Direction Change Interrupt
The PCNTn_PCNT module sets the DIRCNG interrupt flag (PCNTn_IF register) when the direction of
the quadrature code changes. The behavior of this interrupt is illustrated by Figure 24.3 (p. 606) .
Figure 24.3. PCNT Direction Change Interrupt (DIRCNG) Generation
Standard async
handshake
interface
PCNTn_S0IN
PCNTn_S1IN
Interrupt
X X
Invalid pulse generated when
the shaft changes direction
n+ 1
n+ 2
n+ 3
n+ 2
PCNTn_CNT
n
Delay from the shaft physically
changed direction until the
counter direction is changed
and the interrupt is generated