User manual

...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 60
www.energymicro.com
8. The controller generates an auto-request for the channel and then arbitrates.
Task C 9. The controller performs task C. After it completes the task, it generates an
auto-request for the channel and then arbitrates.
Primary, copy D 10.The controller performs four DMA transfers. These transfers write the alternate
data structure for task D.
11.The controller sets the cycle_ctrl bits of the primary data structure to b000, to
indicate that this data structure is now invalid.
12.The controller generates an auto-request for the channel and then arbitrates.
Task D 13.The controller performs task D using an auto-request cycle.
14.The controller sets dma_done[C] HIGH for one HFCORECLK cycle and enters
the arbitration process.
8.4.2.3.6 Peripheral scatter-gather
In peripheral scatter-gather mode the controller receives an initial request from a peripheral and then it
performs four DMA transfers using the primary data structure. It then immediately starts a DMA cycle
using the alternate data structure, without rearbitrating.
Note
These are the only circumstances, where the controller does not enter the arbitration
process after completing a transfer using the primary data structure.
After this cycle completes, the controller rearbitrates and if the controller receives a request from the
peripheral that has the highest priority then it performs another four DMA transfers using the primary
data structure. It then immediately starts a DMA cycle using the alternate data structure, without re-
arbitrating. The controller continues to switch from primary to alternate to primary… until either:
• the host processor configures the alternate data structure for a basic cycle
• it reads an invalid data structure.
Note
After the controller completes the N primary transfers it invalidates the primary data
structure by setting the cycle_ctrl field to b000.
The controller asserts dma_done[C] when the scatter-gather transaction completes using a basic cycle.
In scatter-gather mode, the controller uses the primary data structure to program the alternate data
structure. Table 8.5 (p. 60) lists the fields of the channel_cfg memory location for the primary data
structure, that you must program with constant values and those that can be user defined.
Table 8.5. channel_cfg for a primary data structure, in peripheral scatter-gather mode
Bit Field Value Description
Constant-value fields:
[31:30] dst_inc b10 Configures the controller to use word increments for the address
[29:28] dst_size b10 Configures the controller to use word transfers
[27:26] src_inc b10 Configures the controller to use word increments for the address
[25:24] src_size b10 Configures the controller to use word transfers
[17:14] R_power b0010 Configures the controller to perform four DMA transfers
[2:0] cycle_ctrl b110 Configures the controller to perform a peripheral scatter-gather DMA cycle
User defined values:
[23:21] dst_prot_ctrl - Configures the state of HPROT when the controller writes the destination data
[20:18] src_prot_ctrl - Configures the state of HPROT when the controller reads the source data