User manual
...the world's most energy friendly microcontrollers
2012-04-24 - Giant Gecko Family - d0053_Rev0.96 592
www.energymicro.com
23.4 Register Map
The offset register address is relative to the registers base address.
Offset Name Type Description
0x000 LETIMERn_CTRL RW Control Register
0x004 LETIMERn_CMD W1 Command Register
0x008 LETIMERn_STATUS R Status Register
0x00C LETIMERn_CNT RWH Counter Value Register
0x010 LETIMERn_COMP0 RW Compare Value Register 0
0x014 LETIMERn_COMP1 RW Compare Value Register 1
0x018 LETIMERn_REP0 RW Repeat Counter Register 0
0x01C LETIMERn_REP1 RW Repeat Counter Register 1
0x020 LETIMERn_IF R Interrupt Flag Register
0x024 LETIMERn_IFS W1 Interrupt Flag Set Register
0x028 LETIMERn_IFC W1 Interrupt Flag Clear Register
0x02C LETIMERn_IEN RW Interrupt Enable Register
0x030 LETIMERn_FREEZE RW Freeze Register
0x034 LETIMERn_SYNCBUSY R Synchronization Busy Register
0x040 LETIMERn_ROUTE RW I/O Routing Register
23.5 Register Description
23.5.1 LETIMERn_CTRL - Control Register (Async Reg)
For more information about Asynchronous Registers please see Section 5.3 (p. 20) .
Offset Bit Position
0x000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
0
0
0x0
0x0
0x0
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Name
DEBUGRUN
RTCC1TEN
RTCC0TEN
COMP0TOP
BUFTOP
OPOL1
OPOL0
UFOA1
UFOA0
REPMODE
Bit Name Reset Access Description
31:13 Reserved
To ensure compatibility with future devices, always write bits to 0. More information in Section 2.1 (p. 3)
12 DEBUGRUN 0 RW Debug Mode Run Enable
Set to keep the LETIMER running in debug mode.
Value Description
0 LETIMER is frozen in debug mode
1 LETIMER is running in debug mode
11 RTCC1TEN 0 RW RTC Compare 1 Trigger Enable
Allows the LETIMER to be started on a compare match on RTC compare channel 1.
Value Description
0 LETIMER is not affected by RTC compare channel 1